Dear Sir\Madam
I plan of using the cdce913 in my new design who include 2 Ethernet MAC , 2 Ethernet PHY and one microcontroller.
Required clock frequency value are : Y1 = 8Mhz ,Y2,Y3 = 25Mhz with SSC ON.
My question is as follow :
1) Can I drive one Ethernet MAC and one Ethernet PHY (25Mhz) from single output of the CDCE913?
the MAC load capacitance is 27pf and the PHY load is 16 pf, or do I need to add fan-out buffer?
2) Using the design software with 12Mhz clock input, I have found that the N divider value is 4050 and the M value is 243 the result of N/M is 16.67777 which generate a 200Mhz VCO frequency, since the result is a fraction value (not integer) are this value legal? (dose the cdce913 lock and produce the required frequency's?)
3)Following question 2 should multiplying the base frequency with a fraction value produce more Jitter at the output?
Thanks
Yuval
