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LMK03200 PECL outputs disabled?

Other Parts Discussed in Thread: LMK03200, LMK00304

When the PECL outputs are disabled electrically what does that look like? That is, if I hook them up to a gate that is OR'ing with a different clock source am I hooking up an indeterminate state? Is there a way to make the output look like a PECL low when disabled?

thanks

Dennis

  • You can use the Thevenin equivalent termination scheme shown in Figure 7-5 of the LMK03200 datasheet.  This will insure the P & N outputs are biased to Vcc - 2V = 1.3 V (logic low level) when the driver is disabled.

    Regards,
    Alan

  • Alan

    So to be clear (to me) when disabled the output is disconnected and the bias network sets the voltage, no current from the output? (so get 1.3V on both positive and negative outputs from the 3.3V divider)

    Wouldn't a low on both positive and negative inputs to the next differential logic device be indeterminate?

    thanks

    Dennis 

  • Yes, there is negligible current from the output when its disabled, so the bias network sets the voltage.  Whether it is decoded as indeterminate/invalid or a valid state depends on the receiver device.  Perhaps you could design the bias network with sufficient voltage offset between P and N that puts your receiver in a deterministic state.

    By the way, we do have some differential clock buffers (e.g. LMK00304/6/8/1) that do decode this input condition as a logic low state. 

    Regards,
    Alan

  • Alan

    I took a look at the part you suggested. Realized that I could stick with the part that I've been using by changing the mode I used it in and it doesn't care about the unused input being indeterminate.

    You need more CML parts, way better to use then PECL, hate all the extra resistors! Been using Micrel parts since they are the only ones that have them. Lots of laser drivers use CML and it makes them easy to drive fast. You could probably make them cheaper, only thing I don't like!

    Thanks for the quick help!

    Dennis