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CDCE62005 Power Optimization

vijetha hn
Expert 1230 points
Other Parts Discussed in Thread: CDCE62005

Hi,

I am using 2 nos of CDCE62005 IC in my design to generate 5 nos of 250MHz clock each with 50 MHz oscillator as input to the secondary input pin. The design is working fine and I greatly thank the Forum Members who helped me in designing. 

But the issue is, in programmed or default state the temperature around the IC on PCB is going up to 55 to 60 deg C.

We have taken all cares those are recommended in datasheet w.r.t the PCB layout for Power. Is there any way of reducing current consumption by disabling any un used features in the synthesizer IC. Please let me know if there is any power optimization methods for this IC.

Regards,

Vijetha 

  • 0
    TI__Genius 10320 points

    Hi Vijetha,

    Can you share your register configuration? What is the current draw for the CDCE62005?

    Gabe

  • 0 in reply to Gabe Ayala
    Expert 1230 points

    Hi Gabe,

    Fullscreen 0576.CDCE62005_2014_02_11_REGISTER STTINGS for CLOCK SYNTESIZER2.txt Download 
    * REGISTERS
0	E9060300 (1110100100000110000000110000)
1	E9060321 (1110100100000110000000110010)
2	E9840302 (1110100110000100000000110000)
3	E9060303 (1110100100000110000000110000)
4 E9060334 (1110100100000110000000110011)
5	00040E85 (0000000000000100000011101000)
6	073E03E6 (0000011100111110000000111110) - NOTE : SYNC_MODE2 is set 1; ENCAL is set to 1; ENCAL_MODE is set 0 (Startup Mode).  
7	BD9075F7 (1011110110010000011101011111) - NOTE : Internal Loop filter is used. The Internal Loop Filter component values are given below.
8	20009D98 (0010000000000000100111011001) - NOTE : Bit 8 (SYNC) is set to 1. Need to confirm its status (Most of the bits are READ ONLY)

* PORTS
0	9D
1	FF
2	DF
3	F9

* INPUTS
PRI	50
SEC	50
AUX	25

* EXTERNAL COMPONENTS
C4	1
R4	1
C5	1

* Internal Loop Filter Components :
C1 = 1.5 pF
C2 = 473.5 pF
C3 = 5.5 pF
R2 = 24 KOHM
R3 = 5 KOHM

BW = 378.4 KHz

Charge Pump Current = 200 uA.

PFD Frequency = 25 MHz

VCO1 Output Frequency = 1000 MHz
VCO Gain = 40 MHz/V

Output Frequencies:
100 MHz
100 MHz
250 MHz
100 MHz
100 MHz

    Fullscreen 5873.CDCE62005_REGISTER SETTINGS for CLOCK SYNTHESIZER1.txt Download 
    * REGISTERS
0	E9840300 (1110100110000100000000110000)
1	E9840321 (1110100110000100000000110010)
2	E9840302 (1110100110000100000000110000)
3	E9840303 (1110100110000100000000110000)
4	E9840314 (1110100110000100000000110001) - NOTE : SYNC_MODE1 is set to 0.
5	00040E85 (0000000000000100000011101000)
6	073E03E6 (0000011100111110000000111110) - NOTE : SYNC_MODE2 is set 1; ENCAL is set to 1; ENCAL_MODE is set 0 (Startup Mode).
7	BD9075F7 (1011110110010000011101011111) - NOTE : Imternal Loop filter is used ; the parameters are mentioned below
8	20009D98 (0010000000000000100111011001) - NOTE : Bit 8 (SYNC) is set to 1. Need to confirm its status (Most of the bits are READ ONLY)

* PORTS
0	9D
1	E0
2	DF
3	F9

* INPUTS
PRI	50
SEC	50
AUX	25

* EXTERNAL COMPONENTS
C4	1
R4	1
C5	1

* Internal Loop Filter Components :
C1 = 1.5 pF
C2 = 473.5 pF
C3 = 5.5 pF
R2 = 24 KOHM
R3 = 5 KOHM

BW = 378.4 KHz

Charge Pump Current = 200 uA.

PFD Frequency = 25 MHz

VCO1 Output Frequency = 1000 MHz
VCO Gain = 40 MHz/V

* Output Frequencies :
250 MHz
250 MHz
250 MHz
250 MHz
250 MHz

    These are my register settings for 2 synthesizers. the synthesizers are configured from CPLD through SPI.

    The current drawn was not physically checked. The board is designed considering 1.65W of Power requirement by LVDS output channels.

    Regards,

    Vijetha

  • 0 in reply to vijetha hn
    Expert 1230 points

    Hello there,

    We are not using Crystal Input (AUX_IN,AUX_OUT) for synthesizer. But still we provide Powers for that (VCC_AUXIN and VCC_AUXOUT). Is there any option to disable this power through SOFTWARE?

  • 0 in reply to vijetha hn
    TI__Genius 10320 points

    Hi Vijetha,

    This is not necessary as there is no XTAL connected to the oscillator. Can you measure the current draw of the device? The table estimate of 1.6W is for a particular configuration, but refer to Table 48 for power calculation as well as Figure 40 for die temperature vs power usage for the CDCE62005.

    Gabe