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LMK04808 can not lock

Kevin Leo
Prodigy 10 points
Other Parts Discussed in Thread: LMK04808, CODELOADER

Hi,
        I encountered some problems , When I useed lmk04808.

My system:
        Mode     :  Dual Loop Mode
        clkin0     :  125M (lvpecl)
        clkin1     :  125M (lvpecl)
        output    :  125M (lvpecl)
        PLL1_R :  125
        PLL1_N :  125

My configuration:
        R0  = 0x000002E0
        R1  = 0x000002E1
        R2  = 0x800002E2
        R3  = 0xC0000023
        R4  = 0x40000024
        R5  = 0x000002E5
        R6  = 0x24440006
        R7  = 0x22220007
        R8  = 0x22440008
        R9  = 0x55555549
        R10 = 0x91C0400A
        R11 = 0x03F0300B
        R12 = 0x830C016C
        R13 = 0x1B13106D
        R14 = 0x130FC00E
        R15 = 0x0000004F
        R16 = 0x01550410
        R24 = 0x000000D8
        R25 = 0x00410019
        R26 = 0x8FA8001A
        R27 = 0x1C001F5B
        R28 = 0x00201F5C
        R29 = 0x010002FD
        R30 = 0x010002FE
        R31 = 0x001F003F

My issue:
        PLL1 sometimes locked and sometimes not locked.
        When it not locked ,I found PLL1_R/2 is a DC signal(3.3V), and the signal input clkin0 is correct, clkin0_los is low.
        when power on the chip , if temperature is greater than 35℃(Approximation) , PLL1 always can not lock.
        If temperature is less than 35℃(Approximation) , PLL1 usually locked, and once locked PLL will remain locked.

        How to solve this problem?

        Thanks and Best Regards

  • 0
    TI__Mastermind 32575 points

    PLL R/2 should be the selected input clock frequency / 250, not DC.  That's probably why you cannot lock.  Check the input MUX selection mode to make sure the correct input is selected.

    Could you please share your application schematic with loop filter values?

    Also, it would be easier if you send your CodeLoader setup file (.Mac) with your device settings, so it is easier to import into the tool and analyze the settings in a graphical manner.

    Thanks,

    Alan