Customer are examining whether IN_SEL can be used as "CLK_EN".
・IN_SEL="1"
⇒High level with 1komega pull-up
⇒INP1/INN1 Input
・IN_SEL="0"
⇒Floating
⇒None
Is such usage possible?
Best regards,
Satoshi
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You can get disable the clock (outputs are static/not toggling) in two ways:
1) Set IN_SEL pin to Open (biased external or internal to 0.5 x Vcc).
2) Set IN_SEL pin to select a differential input pair with no input clock; instead, tie input buffer to a static logic low (e.g. pull-down INP to GND and pull-up INN to Vcc using 4.7k resistors).
Regards,
Alan