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LMK04826 / skew at output between Device CLK and SYSREF

Toshiyuki
Mastermind 7075 points


Hi,

Regarding skew at output between Device CLK and SYSREF, the Datasheet doesn't say the spec.

However, we believe the spec is the most important for JESD204B interface. why the skew isn't specified in the Datasheet ?

Best Regards

Kato

  • 0
    TI__Mastermind 28560 points

    This is a good question.  The skew for this parameter is expected to be similar to the DCLKout to SDCLKout as Device Clock skew spec.

    However we have been suggesting the best method to setup the timing for this is to use continuous SYSREF mode to setup the phase relationship between device clock and SYSREF.

    We will be adding this spec in the future.

    73,

    Timothy