Buffer IBIS Model rise time

Hithesh

I was trying to get the rise time from IBIS file. The IBIS file has rise time measured from 20-80%.
To get the 10-90% rise time, I just multiplied the denominator(time) by 0.6/0.8

From what I understand the values in IBIS file are measured with a reference load - 50 ohm Resistive load I guess.

How come the buffer output voltage takes the same time to change from 0V to 0.5Vcc and 0V-Vcc if the load is resistive. This seems counter intuitive.

over 11 years ago

0 Arvind Sridhar over 11 years ago

TI__Mastermind 24205 points

Hi Hitesh,

Per my understanding, "Ramp Rate" as specified in the IBIS models (Version 4.0) is defined as

dV/dt = (20%-80%) voltage swing / Time taken to swing the above voltage

dV is the 20-80% swing of the buffer when driving into a specified load RL. Typically 50 ohms to Vcc for falling edges and 50 ohms to ground for rising edges (for LVCMOS Outputs)

For example, if a buffer’s typical falling edge output swings from 3.3 V to 0.8 V for a resistive load of 50 Ω
connected to 3.3 V, the dV part of the typical dV/dt (falling edge of [Ramp]) would be 0.6 * (3.3 – 0.8) or 1.5V.
RL would be set to 50

Regards

Arvind

0 Hithesh over 11 years ago in reply to Arvind Sridhar

Genius 3290 points

Arvind, I was looking at ramp data in IBIS file.

The rise dV/dt_r is 700mV/190psec

Fall is dV/dt_f is 1.07V/238psec

In this case, the dV for Falling edge is not 1.5V

I don't understand how they got 700mV for rising

V_fixture = 3.3V
V_fixture_min = 3V
V_fixture_max = 3.6V
R_fixture = 50Ohm
C_fixture = 0F

0 Arvind Sridhar over 11 years ago in reply to Hithesh

TI__Mastermind 24205 points

Hi Hitesh,

What device IBIS model are you looking at?

Regards

Arvind

0 Hithesh over 11 years ago in reply to Arvind Sridhar

Genius 3290 points

Arvind Sridhar said:

Hi Hitesh,

What device IBIS model are you looking at?

Regards

Arvind

This is the Netx50 ASIC IBIS

Clock & timing

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Buffer IBIS Model rise time