Other Parts Discussed in Thread: CDCM6208
Hello,
I am including CDCM6208 in a new design. Output configuration will be custom so my Master will program via SPI the device.
Power up and programming sequencing appear not clear to me from datasheet description.
To be safe for DSP interface I need to avoid clock input switching during configuration.
To do this my purpouse is to follow these step:
1 RESETN -> '0'
2 Program SPI registers
3 RESETN -> '1'
This looks to be discord with p.29 description
" Exiting the reset state occurs automatically after power is applied and/or the system restores the state of the PDN or RESETN pins from the low to high state.
Exiting the reset state using this method causes the device defaults to be loaded/reloaded into the device register bank. Invoking a device reset via the register bit does not restore device defaults; rather, the device retains settings related to the current clock frequency plan."
My guess is that after a transition of RESETN from '1' to '0' state a default configuration wiill be restored. Till RESETN = '0' the SPI Master can program the device and when configuration is done RESETN can be release to '1' state.
This will be in accord with p.6 desctription of the datasheet:
"The device can be programmed via SPI while RESETN is held low(this is useful to avoid any false output frequencies at power up)."
Can someone confirm this in order to avoid time spending test?
