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WEBENCH Clock Architect and CDCM7005-SP

Other Parts Discussed in Thread: CDCM7005-SP, CDCM7005, LMX2571

Two part question:

1. The Clock Architect in WEBENCH Designer provides solutions for the CDCM7005. Do the same solutions apply for the CDCM7005-SP?

2. When I set my tunable frequency range, the generated solution shows "NaN MHz." Is this a bug in WEBENCH Clock Architect or something else?

  • Hi Charles,

    1. Yes

    2. The tool does not know what frequency it should use for simulation since a tuning range of 20-200 MHz was specified. Ideally, the tool should have just picked a frequency (say 200 MHz) and displayed that instead of 'NaN'. This bug will be fixed.

    However, selecting this device assumes that you will pick a different VCXO frequency (20-200 MHz) for each output frequency that you desire.

    To tune within this range using a high performance/low power Frac-N PLL try LMX2571: http://www.ti.com/product/lmx2571

    Regards

    Arvind Sridhar