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LMX2581 Output Power Level

Other Parts Discussed in Thread: LMX2581

Hello,

I'm trying to use a LMX2581EVM and had a query regarding the output power level. The datasheet mentions that for an output frequency of 2.7GHz, an inductive pull up gives an output power varying from about roughly 7dBm to 12dBm.  

With RFoutA powered down using software, using RFoutB of the EVM, which has a 18nH inductive pull up, the output power for me varies from 3.7dBm to 9.5dBm. The unused output is terminated with a 50 ohm resistance. My concern is why the output power level is only 3.7dBm for a setting of 15 as OUT_PWRB. This is because, that setting gives be the best phase noise performance but not sufficient output power (7dBm would work for my application). What could be the reason for this and how can I improve it? (I am aware of the fact that the pull up components are not placed close to the output on the EVM, however would this result in such a large drop in the output power?)

Also, while RFoutB+ and RFoutB- give similar output power, RFoutA+ and RFoutA- tend to have slightly varying power levels. Additionally, what type (resistive/inductive) of pull up would be better in terms of the phase noise performance?

Another query I has was in the LMX2581 EVM, using the internal XO, what is the peak to peak voltage swing at the OSCin pin?

Awaiting a reply,
Thanks and Regards,
Ajay

  • Ajay,

    If you haven't already, I encourage you to look at the output power graphs in the back of the EVM instructions as there were done with well-controlled enviroment;  the cable I used was a 1" barrel connector.

    Also be sure to review 8.3.11.2 in the datasheet.

     

    For optimal output power, use the inductor pull-up and a setting of 30.   This should give 7.2 + 3.9 = 11.1 dBm output power, which gives enough power to follow up with a 3 dB pad for good matching, high power, and controlled matcing.

    Now if you are at 2.7 GHz output and getting much lower output power, it is likely due to layout.    It is absolutely critical to put the pull-up component close to the  LMX2581 and not doing so sacrifices output power.  In fact if you route only one outptut instead of 2,

    you can get higher output power because you can get the pull-up component closer.

     

    Regards,

    Dea

  • Hi Dean,

    Thanks for your prompt reply. What about the peak to peak voltage swing at the OSCin pin when using the internal XO? As per my calculations the resistive network of R14, R15 and R16 brings it down to 0.5 Vp-p from the 2.5Vp-p that the CWX813 provides (assuming that the input impedance of the OSCin pin is roughly 100 ohm, from Figure 13 in the datasheet). Is that correct?

    This is because in my experiments on the EVM using an external OSCin I observe that the phase noise performance improves with a larger peak to peak voltage and I imagine the same could be achieved using the internal XO provided the resistive network is changed. 

    Awaiting your reply,

    Thanks and Regards,
    Ajay

  • Hi Ajay,

    What is your OSCin input frequency and what kind of signal source it is? For example, sine wave or square wave; from signal generator or XO.
  • Hi Noel,

    I am using a SMA 100A to generate a sine wave with a 100MHz frequency, and I then employ the x2 feature to further increase the phase detector frequency to its maximum value of 200MHz to get a more optimal loop filter bandwidth. 

    As for the internal XO, it is the CWX813-100.0M that came pre-installed on the EVM which provides a LVCMOS output. My question regarding the internal XO is that what voltage is ultimately seen at the OSCin pin after the resistor network, given that the output by the XO is nearly 2.5Vp-p.

    Regards,
    Ajay

  • Hi Ajay,
    The OSCin amplitude is not the direct reason for better output phase noise. Remember that the output phase noise of a PLL depends on (1) the reference clock noise and slew rate (2) the noise from the PLL device and (3) the VCO.
    In this case, the reference clock is a sine wave, when you increase its amplitude, the slew rate is actually getting higher, so you got a better output phase noise.
    You could also try using a higher frequency OSCin and then use the R-counter to divide it down to the desired fpd.
  • Hi Noel,

    I shall look into that, thanks.

    But what about the second question? What is the peak to peak voltage swing at the OSCin pin when using the internal XO on the EVM? Based on this, I can change the resistive network to improve the slew rate and hence the phase noise, while still being sure that it does not go over the absolute maximum ratings specified.

    Regards,
    Ajay
  • Hi Ajay,
    I don't have the board now, if you have the board, you can measure it.
    Pls note that the output of the XO is a square wave, you will not get many improvement on slew rate .
  • Ajay,The reasoning in the EVM network is as follows:
    1. Max OSCin input voltage is 1.7Vpp
    2. For optimal spurs, it is desirable to have the impedance as seen from OSCout looking outwards to look like 50 ohm.
    3. Looking outwards from OSCin, I see 33 + 18 ~ 50 ohms
    4. If I assume 3.3 V for the OSCout, I see a volatge divder 47 ohm and 18 ohm, that gives about 1 Vpp.
    In truth, we probably could tinker with this network and increase the 18 ohms and decrease the 47 ohms to still have OSCout pin see 50 ohms and get a higher voltage level. Right now, it looks more like 1 V. I think what may have happened is that the original silicon from the LMX2581 test chips supported a lower OSCin voltage level, but we increased it to 1.7V in later revisions of the silicon, which are the ones that we released to the maket.
    Regards,Dean
  • Hi Dean and Noel,

    Thanks for the answers. I shall try it out on the EVM and see how it affects the performance.

    Regards,
    Ajay