The reference to PLL1 from CLKin0(cpri recovery clock from FPGA) and CLKin1(test clock from signal generator).In normal operation, PLL1 uses CLKin0 for reference.PLL1 can’t be locked at -40℃,but unlock doesn’t happen every power reset time. When PLL1 is unlocked at -40℃, it can be locked by initializing LMK04826 registers. When PLL1 uses CLKin1 for reference, it is always locked at -40℃ after every power reset time.We only find one board has this problem.
How can we confirm if this LMK04826 has problem?
Thanks.
