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cdclvc1102 CMOS output load driving 50 ohms

Other Parts Discussed in Thread: CDCLVC1102

Hi,

I was planning to use the cdclvc1102 to buffer a 3.3V CMOS square wave input(10MHz output freq) from a clk generator chip to generate a clean 10MHz sine wave by passing the square wave through a good band pass filter. The filter input impedance is expected to be 50 ohms. I was planning to use the termination with a 10 ohm series resistance at the CMOS output as shown in the attached diagram.

Can you confirm if the cdclvc1102 IC will be able to drive this load without issues? If yes, can you also please say if the voltage at the filter input will be

3.3*50/(50+10)=2.75V itself?


.

Thanks,
Anoop

  • Hi Anoop,

    You need to take into account the output impedance of the CMOS buffer (~45 ohms typical at 3.3V)

    So the expected swing at the receiver (assuming that the load is purely resistive 50 ohms) is roughly 3.3*50/(45+10+50) = 3.3*50/105 = 1.57V. See Hyperlynx sim below

  • Hi Arvind,

    Thanks a lot for the quick response, I had just noticed the 45 ohm output imepdance part in the specsheet a short while ago, sorry I missed it earlier, thanks for pointing it out. I suppose even the 1.57V reduced swing is okay for me in terms of signal amplitude, but can you please say if the device can safely drive this load continuously and reliably without getting damaged. The continuous load current in this configuration appears to be ~16mA if my observation is correct(well clear of the 50mA absolute limit) but I just wanted to be sure.

    Also, the signal integrity wouldn't see much degradation too right hopefully, in this configuration, apart from the attenuation due to voltage division?

    Thanks,
    Anoop
  • Hi Anoop,
    You understanding is correct for both. There should not be an issue driving a 50 ohm load continuously or the signal integrity.
    RegardsArvind Sridhar
  • Thanks Arvind, will keep these in mind