Hello,
We are trying to synchronize multiple LMK04828 and multiple JESD204B Subclass 1 ADC and DAC converters. In order to do that all LMK04828 in the system have to generate SYSREF pulses on the same rising edge of all output device clocks.
My question is if there is any app note or recommendations on how to implement such synchronization across all LMK04828 buffers in the system. I cannot find any setup and hold requirements for the SYNC input. It is not clear for me how we can make sure that multiple LMK04828 buffers will capture MASTER SYSREF on the same rising edge. The synchronization must be repeatable after cycling the power. The input clock is 125MHz or can be a different frequency if needed, the output clock is 1GHz, total 56 JESD204B Subclass 1 devices.
Any information here would be great. Thanks.
