Hello,
I am in the thermal simulation phase of my design.
Only relevant information I got from the spec is Teta_JA of 15 (or 16) C/W.
1. Can you provide me with Teta_JC_top and Teta_JC_bottom figures?
2. I intend to take this device into space. We use Tj_derated= Tj_max-40= 85c.
Does it mean from the example at the datasheet at p.41 not (1), that my PDmax is 0W ??
3. I wanted to verify my power calculations to make sure I will not over simulate:
One LVPECL diff pair at port 0, one LVCMOS at port 3, One LVCMOS at port 11
(three different frequencies, unable to share same divider...)
a. Basic= 122m + 17.3m=139.3mA
b. Two different groups (0,1,10,11 and 2,3,4,5) : 2x2.8m=5.6mA
c. Three Dividers (<25) : 3x25.5m=76.5mA
d. Two LVCMOS (100Mhz and 150Mhz) : 2x26mA = 52mA
e. One LVPECL : 20mA within the LMK + 11mA over the resistors
Total LMK Pdiss= (139.3 + 5.6 + 76.5 + 52 + 20)= 293.4mA x 3.3V = 968mW
I am holding my thermal simulation designer for now, so I will appreciate a prompt answer.
Many thanks
Amnon