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LMK03806



Hello,


I am in the thermal simulation phase of my design.


Only relevant information I got from the spec is Teta_JA of 15 (or 16) C/W.


1. Can you provide me with Teta_JC_top and Teta_JC_bottom figures?

2. I intend to take this device into space. We use Tj_derated= Tj_max-40= 85c.


Does it mean from the example at the datasheet at p.41 not (1), that my PDmax is 0W ??


3. I wanted to verify my power calculations to make sure I will not over simulate:


One LVPECL diff pair at port 0, one LVCMOS at port 3, One LVCMOS at port 11


(three different frequencies, unable to share same divider...)


a. Basic= 122m + 17.3m=139.3mA


b. Two different groups (0,1,10,11 and 2,3,4,5) : 2x2.8m=5.6mA


c. Three Dividers (<25) : 3x25.5m=76.5mA


d. Two LVCMOS (100Mhz and 150Mhz) : 2x26mA = 52mA


e. One LVPECL : 20mA within the LMK + 11mA over the resistors


Total LMK Pdiss= (139.3 + 5.6 + 76.5 + 52 + 20)= 293.4mA x 3.3V = 968mW

I am holding my thermal simulation designer for now, so I will appreciate a prompt answer.

Many thanks

Amnon

  • Hi Anmon, 

    1. Can you provide me with Teta_JC_top and Teta_JC_bottom figures?

    Teta_JC_top = 6.9 °C/W

    Teta_JC_bottom = 0.8 °C/W

    2. I intend to take this device into space. We use Tj_derated= Tj_max-40= 85c. Does it mean from the example at the datasheet at p.41 not (1), that my PDmax is 0W ??

    I am sorry, I dont follow this question. If the power consumption is 'X' W, Theta JA and the ambient temperature are known, the junction temperature can be calculated to be Ambient+JA*X degrees. The recommended max junction temperature on this device is 125C


    3. I wanted to verify my power calculations to make sure I will not over simulate:

    Only change is LVCMOS current: If operated as 2 pairs (@100MHz and 156.25 MHz), total current = ~36X2 = 72mA (Page 42 of datasheet). Operating LVCMOS as pairs even though you want a single copy is probably much better from point of view of cross coupling/EMI. Operating them as single outputs is better for power (~21.5*2 = 43mA) but worse for crosstalk spurs to neighboring signals.

    One LVPECL diff pair at port 0, one LVCMOS at port 3, One LVCMOS at port 11 (three different frequencies, unable to share same divider...)
    a. Basic= 122m + 17.3m=139.3mA
    b. Two different groups (0,1,10,11 and 2,3,4,5) : 2x2.8m=5.6mA
    c. Three Dividers (<25) : 3x25.5m=76.5mA
    d. Two LVCMOS (100Mhz and 150Mhz) : 2x26mA = 52mA
    e. One LVPECL : 20mA within the LMK + 11mA over the resistors
    Total LMK Pdiss= (139.3 + 5.6 + 76.5 + 52 + 20)= 293.4mA x 3.3V = 968mW

  • Hello Arvind,
    Thanks for the prompt answer.
    I am sorry for the trouble, but when I noted my thermal designer about the LMK thermal pad he requested the Teta-JB rather than Teta-JC.
    Can I have this information (Teta-JB) as well?

    Thanks
    Amnon
  • Hi Anmon,

    Theta JB is 4.0

    Regards

    Arvind Sridhar