LMK04828B - Holdover

Hi Hiroshi-san,

Holdover mode is described in detail in section 9.3.7 of the datasheet, please let me know if you find any part confusing.

Regarding the parameters you mentioned:

- fPFD1 is a loop parameter, you decide it based on your frequency plan requirement and min/max restrictions of the PFD and dividers. if you have several possible alternatives, we recommend going for higher PFD frequency for better noise performance. but this might not be the optimum, so please use the Clock Design Tool to optimize the PFD frequency.

 - The paramters PLL1_WND_SIZE, PLL1_DLD_CNT are controlling how the lock is achieved (from unlock , non holdover state). DLD (Digital Lock Detector) circuit will check that both inputs to the PFD has a dealy less than WND_SIZE, if true, it starts counting number of reference edges equal to DLD_CNT to assert DLD signal. if PFD input signals skew esceeded WND_SIZE for at least one cycle before DLD_CNT is achieved, the process aborts and has to start again to asser lock.

smaller WND_SIZE means tighter PFD offset is considered for lock. higher DLD_CNT means the input/output has to stable enough to achieve lock. together those two parameters determine how accurate your output will be relative to the input when lock is asserted. this is illustrated in the following relation:

Tighter ppm error might be required by a communication system with limited error budget for the clock. to guarantee the required accuracy, the system might set higher CNT, and lower WND. note that this is a function of the fPFD.

 - Parameter HOLDOVER_DLD_CNT is the equivalent parameter to PLL1_DLD_CNT, but for aquiring lock from holdover state instead of unlock state. ( i.e. exiting the holdover). same relation applies as above.

The tradeoff in setting very tight ppm is settling time, which gets longer. and possibility of difficulties achieving the lock if the input signal is modulated or noisy that is preventing the tight ppm to be achieved.

- Regarding your example: you mentioned that the reference switched to a lower frequency. this is not a typical case, but in that case the HOLDOVER more should stay engaged. the issue you see is holdover exit without recovered correct frequency. I bet this is a configuration issue. please send the .mac file of your configuration.

The following figure shows the criteria of entering and exiting holdover.