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CDCE62002 cannot lock the output clock

Other Parts Discussed in Thread: CDCE62002

CDCE62002 cannot lock the output clock, I found the EEPROM of CDCE62002 cannot self-reload into RAM when power up.

The LE and PD go to high at the same time when power up. I added a reset chip on PD to hold low for about 200ms but still cannot lock the clock.

But when I short the PD pin and GND after power up, or I add an MCU to the CDCE62002 for online configuration the CDCE62002 can lock the output.

  • Hi Yingnan,


    Can you read back the register contents of the CDCE62002 after power up? Have you tried reprogramming the EEPROM with the correct register settings for lock?

    When releasing PD, is the maximum time for rise and fall time of PD violated?

    Regards,

    Gabe

  • Hi Gabe,

    Thank you for your help. The configuration firmware of CDCE62002 is downloaded in th ICT test process. So there is no MCU and I can't read back the register.

    I check the design and all meet the requirement in the SPEC of CDCE62002.

    Now I can lock the output without any extern device by changing the configuration of the register.

    So I want to know which frequency the clock of EEPROM is in the CDCE62002, or which parameter is related with the clock of EEPROM?

    I think there should be some information which are not in the SPCE of the CDCE62002.

    Best regards,

    Yingnan