This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Difference Between a Clock Buffer and Clock Generator



Hi team,

I am seeking a better understanding of the difference between a clock buffer and a clock generator. I understand that a clock generator can take a single cystal and create many different clocks with various frequencies that can be fed into many ICs within a system. I also understand that a buffer is used to drive a load and produce more signal strength.

With that said, I want to make sure I understand clock buffers correctly.. Can clock buffers be used to create various clock signals with various frequencies from one signal, similar to that of a clock generator, with the added benefit that the signal is buffered and has improved drive strength? Or can clock buffers only be used to fan out a single clock signal with all of the outputs at the same frequency as the input signal?

Thanks in advance!

Jared

  • Hello Jared,

    Clock buffer is typically used to fan out clock signal and isolate the source from the loads. by default buffer doesn't have PLL inside, rather some input and output stage.

    there is however, some extra features that can make buffers more useful:

    - having multiple controllable (on/off) outputs
    - separate power supplies for outputs or for input/output allowing it to work as a level shifter
    - universal output stage that allows conversion between signaling schemes like ( LVPECL, LVDS, LVCMOS, HCSL, HSDS,...)
    - working as a multiplexer if more than one source can be fanned out to the output array. this requires a MUX at the input
    - having multiple banks allows the buffer to fan out different signals.

    so a buffer, natively, doesn't change the frequency properties of the input signal, and should minimize the additive noise which is added to the input during buffering.

    - adding a PLL in the buffer path allows:

    - Better phase noise performance in the case of noisy source, and sort of signal cleaning

    - Adding Spread Spectrum Modulation to the incoming signal.

    - having better control over the propagation delay of the buffer, e.g. having constant delay or zero-delay buffer

    Here we see some change of noise properties/some modulation. so PLL buffers are more advanced in that sense. still no frequency change is expected

    - adding an integer divider before the output stage, buffers can provide a divided version of the clock.

    here we see frequency change, but only a division, and those buffers are usually called buffer/divider.


    Clock Generator is different category of devices, Clock generators are used to synthesize freely multiple required output frequencies from a fixed input frequency It has one or more PLLs, and one or more input/output stages plus output (and may be input) dividers. those dividers can be either integer or fractional.

    The clock generator gives great flexibility to system designer. in it's simplest form, most of the clock generators can also be used as a buffer, although a native buffer would be a cheaper solution here. The buffer, though, can not be used as a generator.

    so a quick selection guide would be

    - if multiple frequencies are required then it's definitely a clock generator

    - if multiple targets require the same signal then it's probably a buffer, if few of them need a divided version you might look for buffer/divider.

    Regards,

    Ahmed