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Input coupling of CDCLVD2106

Satoshi
Guru 19575 points
Other Parts Discussed in Thread: CDCLVD2106
Please let me know about two points below of CDCLVD2106 input.
 
------------------------------------------------------------------
①If LVDS input (by FPGA) is 1.8V, which below is correct ?
　・1.8V input by AC Coupling (Vcc is 2.5V)

　・Input set LVDS_25 (2.5V) and DC Coupling
 
②Is there reference circuit of below?
　　・LVDS_18⇒Buffer（CDCLVD2106）⇒LVDS_25
　　・LVDS_25⇒Buffer（CDCLVD2106）⇒LVDS_25
 ------------------------------------------------------------------
 
Best regards,
Satoshi
  • 0
    TI__Mastermind 24205 points

    Hi Satoshi-San,

    If the common mode voltage of the driver (FPGA) satisfies the CDCLVD2106 receiver common mode voltage requirement of > 1.0V and less than Vcc - 0.3 (~2.2V), and has a differential peak-peak voltage of > 0.4V, the FPGA output can be DC coupled to the CDCLVD2106 input. You will only need to install a 100 ohm differential resistor across the differential inputs of CDCLVD2106. This is shown in Figure 15 of the CDCLVD2106 datasheet.

    If the CDCLVD2106 datasheet requirement for the common voltage is not satisfied by the driver, the driver will need to be AC coupled into the inputs of CDCLVD2106 as shown in Figure 16.

    Regards

    Arvind Sridhar