Hi,
I am using CDCE62005 in my board. Secondary input pins are used at input side and 50MHz LVCMOS clock is supplied to Sec input pins. The circuit is working fine with different output frequency settings. I took help from TI forum before the functioning of the circuit (https://e2e.ti.com/support/clocks/f/48/p/318410/1116156#1116156)
I attached the full settings of CDCE62005 in working condition. File name :CDCE62005_REGISTER SETTINGS for CLOCK SYNTHESIZER1_125MHz.txt
Now customer wants to use Primary input and disable secondary input pins. So we updated the Reg 1, Reg 2 and Reg 5 settings manually. The updated Register file is attached. File name : CDCE62005_Primary_Input.txt
But even though we do not connect source to Primary Input pins we are getting clock output (in the presence of Secondary Input source). Please let us know why this is happening, are we missing anything in the register setting?
Regards,
Vijetha
* REGISTERS 0 E9040300 1 E9040321 2 E9040302 3 E9040323 4 E9040314 5 00040E85 6 073E03E6 7 BD9075F7 8 20009D98 * INPUTS PRI 50 SEC 50 - Selected AUX 25 * EXTERNAL COMPONENTS C4 1 R4 1 C5 1 * Internal Loop Filter Components : C1 = 1.5 pF C2 = 473.5 pF C3 = 5.5 pF R2 = 24 KOHM R3 = 5 KOHM BW = 378.4 KHz Charge Pump Current = 200 uA. PFD Frequency = 25 MHz VCO1 Output Frequency = 1000 MHz VCO Gain = 40 MHz/V * Output Frequencies : 125 MHz 125 MHz 125 MHz 125 MHz 125 MHz
REGISTERS Primary | Secondary EB04032 | E904030 E904030 | E904032 E904030 | E904030 E904032 | E904032 E904033 | E904033 00040E7 | 00040E8 073F03E | 073E03E BD9075F | BD9075F 20009D9 | 20009D9 PORTS 0 9D 1 FF 2 DF 3 F9 INPUTS PRI 50 SEC 0 AUX 0 EXTERNAL COMPONENTS C4 280.4992u R4 25.7305 C5 9.5963u