Two reference frequency components Pri_frq and Sec-frq are used and
Output 1, Output 2 are generated using Pri_frq and Output 3 is generated using Sec_frq.
Is it possible this way to generate multiple clock sources which are created by two independent references simultaneously?
More specifically, Pri_frq will be fixed as constant, on the other hand Sec_frq will be persistently changed. Output 1 and Output 2 will be fixed and
Output 3 which is generated based on Sec_frq, will be changed as Sec_frq is changed.
Does CDCE62005 have this function?
I am looking forward for your replies.
Thank you.