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LMX2492 Eval Board/Ramp signal example

Zhixiang Wang
Prodigy 65 points
Other Parts Discussed in Thread: LMX2492, CODELOADER, LMX2492EVM

Dear all,

I am a student from Nanyang  Technologinal University.

Now i am testing the LMX2492 Eval Board. I downloaded and installed the current version of CodeLoader.

I followed all the instructions on LMX2492EVM  User's guide.

Then i tried the example provided on page19. But i cannot get the ramp signal centered at 4.8GHz(vco/2).

The signal i got on spectrum analyzer is attached. Screenshots of other configurations are also provided.

Is there anything else i forgot to do?

Thanks!~

  • 0
    TI__Expert 4085 points

    Hi zhixiang,

    Thank you for your interest in our products. We received your question and will be answering it as soon as possible. We appreciate your patience.

    Regards,

    Julian

  • 0
    TI__Mastermind 27851 points

    I don't see anything wrong with this setup.   However, to get the ramping to start, you ahve to toggle the RAMP_EN bit or write to the N divider. 

    Coudl this be the issue?

    I also assume that you have tested that the PLL locks to the corrrect frequency.

    There is a divide by 2 on teh output of the VCO on our eval board the frequency that your carrier is at does not seem to be withing the range you are ramping at all.

    If you have not achieved a lock on our board, try this:

    1.  Use the default mode

    2.  Press CTL+L to lock

    3.  If no lock, try toggling the POWERDOWN bit to ensure that the current is changing.  If not, then perhaps there is a communication issue with the device.

    REgards,

    Dean

    Regards,

    Dean

  • 0 in reply to Dean Banerjee
    Prodigy 65 points

    Hi Dean，

    Thanks for your reply！

    I forgot to lock the PLL.

    I got a ramp signal centered at 9.5GHz.

    Why there is 100MHz shift?

    Best regards,

    Zhixiang

  • 0 in reply to Zhixiang Wang
    TI__Mastermind 27851 points
    Zhixiang,
    It looks like you are getting 9.3-9.7 GHz and yo expect 9.4 - 9.8 GHz. From your settings, I am not sure why.

    The ramping works by just adjusting the fraction, so if somehow you were to start at 9.3 MHz, then it would ramp as normal at 9.3-9.7 GHz. Is it possible that somehow the PLL was orginally locked at 9.3 GHz before this ramp was started?

    Regards,
    Dean
  • 0 in reply to Dean Banerjee
    Prodigy 65 points

    Dear Dean，

    It locked at 9.3GHz before i enabled the ramp.

    I also tried 9.6GHz, the pll locked at 9.5GHz. Still 100MHz shifted.

    Why there is 100MHz shift of the output frequency?

    Best regards,

    Zhixiang