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External VCO mode for LMK04828

Other Parts Discussed in Thread: LMK04828, CODELOADER

LMK04828 is using as clock distribution in external VCO Mode. I am using code loader to programming the input and output frequencies.

My doubt is ,

1. I have selected VCO (clkin1 external VCO) in outputs tab. It is taking the frequency from VCO frequency from PLL2 tab. How to enter frequency in external vco mode. input frequency to Fin is 2GHz.

Regards,

bharath

  • When enabling external VCO mode, you are correct to set the mux to CLKin1, External VCO. You will use PLL2 to program the VCO frequency as you have before. Other items:
    - You may need to change the PLL2 charge pump polarity to "+" from "-"; click on the +/- sign in the PLL2 tab to do this.
    - You also need to route CLKin1 to the VCO select mux, select CLKin1_OUT_MUX (Register 0x147[3:2] = 0x00 (Fin)
    Note the routing from the functional block diagram on page 32 of the datasheet.

    73,
    Timothy

  • Dear Timothy,

    Thanks for your information.

    I have done changes as you suggested for external VCO Mode.

    My doubt is ,

    As per block diagram on page 32 in datasheet . Clkin1 can be used as alternate input for clock distribution in external VCO mode.

    By setting the Register "CLKin1_OUT_MUX" to Fin and "VCO_MUX" to Clkin1(External VCO). Fin (clkin1) is routed to Clock distrubution path. but I can't able to enter the exact frequency in VCO under PLL2 tab.

    Is there any other settings to be done?


    Regards,

    Bharath

  • Hello Bharath,

    At this time we don't have the math calculations setup for distribution mode.  The LMK04828 always thinks it is in the pll mode.  So to make the VCO frequency match, you need to type in OSCin, R divider, N divider (or VCO frequency) to fake the VCO frequency.


    The calculated frequencies are always just a convenience.  The only thing that really matters is the divide values.

    73,

    Timothy

  • Hello sir,

    Thanks for Supporting.

    We tested this external VCO Mode using Hardware by modifications required. We are giving 150MHz to External VCO ( as a test frequency) and divided  by 10 by using clock divider option to generate 15MHz ouput frequency at DCLKOUT0.  we programmed DCLKOUT0_MUX to Divider Only  with this setting we are not observing any output frequency. If we change to Bypass Mode we are observing the 150MHz frequency at output of DCLKOUT0 pin. 

    What might be problem it is not considering the Divider mode  and we tried by using other options but only in bypass mode we are observing the output.

    Please suggest any other register setting has to be set to use in divider only mode.  

    Regards, 

    bharath

  • Hello,
    It sounds like you've got SYNC enabled. You can either disable SYNC (could be sync pin, SYNC_POL bit, change SYNC_MODE or SYSREF_MUX. All these bits can play a part in SYNC assertion as SYNC & SYSREF is shared.
    Another simple method is to set the SYNC_DIS0 bit = 1. This will disable SYNC from impacting the divider of DCLKout0.

    73,
    Timothy
  • Thanks Timothy,

    I have made the settings as you suggested. Now I am getting the device clock.


    Regards,

    bharath

  • Hi Timothy,

    I also have trouble understanding how to configure external VCO properly. So I have a set clki1 to external VCO, and the input clock frequency is 2GHz. I want to get 200MHz clock output on DCLK0 and DCLK10, 125MHZ on DCLK12, and 25MHZ on SDCLK3 as my SYSREF. So far 125MHZ and 25MHZ are able to output correctly, but I couldn't get 200MHZ. But if I change the divider value for DCLK0 and DCLK10 to a higher number (twice as the number I preset), then I could get 100MHZ(seems to me that LMK is only able to output frequency that's under 200MHZ, which is not true, because I have tested LMK on ADC EVM, it is able to output 200MHZ with no problem). Do you have any idea what is my problem here?

    Also could you please briefly explain how does PLL1 and PLL2 work when I use an external VCO? Acoording to the block diagram, figure 10, VCO MUX can choose Fin as the input, then is able to directly distribute it's clock frequency to DCLK and SDCLK. Am I understanding the diagram correctly?

    Thank you very much!
    Angela

  • Timothy,

    Do we have a calculation tool (GUI or Spreadsheet) for the LMK04828?  I don't see one on the PF page, nor on the EVM page.

    ~Leonard 

     

  • You should be able to find a link to CodeLoader (older software) or TICS Pro (newer software, LMK04828 is currently being added) from the Tools page of the LMK04828.

    The new software is worth using. We'll be making a few more updates to it.

    Unfortunately they hide the most useful stuff, the software, at the very end of the page.

    Both CodeLoader and TICS Pro can export the register map for programming.

    73,
    Timothy

  • okay, thanks, this is great - looks like these were just freshly added.  The Webench tool does not get to the same results, I'm guessing - is that true

    When should one be used over the other

    And of the three listed under Software, under what conditions should each be used

    ~Leonard