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CDCM6100xEVM crystal Circuit

Daniel Gregor
Prodigy 90 points
Other Parts Discussed in Thread: CDCM61004, CDCM6100XEVM

Hi,

I will use the CDCM61004 in my design. For my circuit design I looked at eval board circuit of the CDCM6100xEVM.  In this circuit I do not understand why a 10pF capacitor parallel to the crystal is required. Do I need a capacitor when I use a crystal with 10pF load capacity?

Next question is the connection of a LVCMOS oscillator. Do you recommend a 3,3V dc coupled device or a 2,5V ac coupled LVCMOS in order to achieve low jitter and high accuracy?

Thanks!

Best regards from Austria,

Daniel

  • 0
    TI__Mastermind 24205 points

    Hi Daniel,

    The input crystal oscillator stage in the CDCM61004 is designed to oscillate at the correct frequency for all parallel resonant crystals with low-pull capability and rated with a load capacitance that is equal to the sum of the onchip load capacitance at the XIN pin (10-pF), crystal stray capacitance, and board parasitic capacitance between the crystal and XIN pin. You do not need an external capacitor when you use a 10pF rated crystal. However, it is perhaps good practice to include a placeholder for a capacitor to ground if PCB routing permits that.

    Per the application note: http://www.ti.com/lit/an/scaa111/scaa111.pdf , the CDCM6100x can be operated with an external LVCMOS reference input applied to the XIN pin, which has internal biasing of 1.9 V. As a result of the bias voltage, the recommended voltage swing for the LVCMOS input is 2.5 V ±30% in order to maintain low distortion and low jitter of the clock outputs from the CDCM6100x. The input duty cycle should be at least 40% to 60%, and the input slew rate should be at least 0.75 V/ns. You could use a voltage divider to scale from 3.3V to 2.5V before the AC coupling capacitor at the Xin input of CDCM6100x if you have a 3.3V LVCMOS driver.

    Regards

    Arvind Sridhar