UHF AM Receiver Needed.

We are trying to rapidly design a fixed-frequency, low cost, low power UHF AM receiver operating at 291.4MHz modulated with a binary FSK audio tone pair of 1200/2200 Hertz.  We would like the output to be either a digital data stream of demodulated ones and zeroes, or the demodulated 12-byte packet.  An FPGA control board would then process the received data. The part we are trying to use now using its OOK function generates  a data pulse for EACH RF envelope peak requiring the FPGA to then figure out, based on edges, whether it should be a one or a zero, and the low number of cycles per bit for 1200 baud data ends up having some cycles being in transition causing a variation in the pulse timing.  Alternatively, we could maybe use a part with analog audio out and do the data recovery using the FPGA board.