[ LMX2582 ] Multiplier Setting and Minimum Output Frequency

Kenichiro

Other Parts Discussed in Thread: LMX2582

[ LMX2582 ] Multiplier Setting and Minimum Output Frequency

Hi,

Can you support to address some queries from my customer with regards to LMX2582?

<Q1>:
In my customer system, there is a 20MHz input signal to LMX2582. This means that the multiplier cannot be used and Fpd must be 20MHz due to the input frequency limitation of multiplier (40MHz to 70MHz). Eventually low input frequency (less than 40MHz) would have some disadvantages on PLL noise floor perspective. Is my understanding correct?

<Q2>:

Can you please elaborate the "minimum output frequency step" with some example?
Sorry, it's not easy to understand...

Thanks,
Ken

over 9 years ago

0 Julian Di Matteo over 9 years ago

TI__Expert 4085 points

Hi Ken,

We received your question. Someone in our applications team will look into this and get back to you.

Thanks,
Julian

0 Dean Banerjee over 9 years ago

TI__Mastermind 28001 points

Ken,

The PLLatinum Sim tool emphasizes powerful simulations, but you might find the TICSPro software more useful for a part specific counter check.

In this case, although the multiplier is limited, the doubler (OSC_2X) can b eused to double this frequency to 80 MHz.

The minimum output frequency step is the phase detector frequency divided by the fractonal denominator. The fractional denominator can be programmed from any value from 1,2,...4294967296

Regards,
Dean

0 Kenichiro over 9 years ago in reply to Dean Banerjee

Mastermind 9165 points

Thanks for your help, Dean!

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[ LMX2582 ] Multiplier Setting and Minimum Output Frequency

[ LMX2582 ] Multiplier Setting and Minimum Output Frequency