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LMK04826 OSCin Minimum Slew Rate

Ben Brinks
Prodigy 10 points
Other Parts Discussed in Thread: LMK04826

Hi,

I'm using the LMK04826 with a single ended 10MHz sine wave for the PLL2 reference input, OSCin.  This violates the datasheet minimum slew rate of 0.15V/ns.  It has been working with no issues on a custom board.  The footnote (2) in the datasheet mentions that the jitter performance will go down as the slew rate is decreased.  Is it ok to operate below the minimum if I can tolerate the decrease in jitter performance?  Will the PLL shut off or lose lock over temperature, or experience any other problems? Or has it just not been characterized below the minimum listed?

Thanks.

  • 0
    TI__Mastermind 24205 points

    Hi Ben,

    Device performance at OSCin reference slew rates <0.15V/ns cannot be guaranteed as they were not characterized. Please use a reference clock with faster slew rates (CMOS output as opposed to Sine-wave output). The other alternative is to use a higher amplitude sine-wave of ~2.0V (Max 2.4V). This would allow max slew rate of the 10 MHz sinusoidal reference clock to ~0.13V/ns. The 0.15V/ns datasheet spec has some internal margin. Output Clock Jitter performance will be degraded when using reference clocks with lower slew rates

    Regards

    Arvind Sridhar