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How CDCE62005 clock generator starts? If PRI_REF+/- not used, shall they be terminated an how?

Peter Boychev
Prodigy 20 points
Other Parts Discussed in Thread: CDCE62005

Hello all,

I didn't find how  CDCE62005 clock generator starts. Does it start ( I mean, the outputs) at some initial frequency? Or in any case is necessary to program it by SPI? I have in my design DSP and it's clocked by  CDCE62005. Shall I make some special for that programmer? Or it shall start somehow and later DSP could reprogram it at the necessary frequency?

The device is using 25 MHz crystal, not using  the inputs for external clock PRI_REF+/- . Shall be they terminated in this case? How?

Thank you

Peter

  • 0
    TI__Mastermind 24205 points

    Hi Peter,

    The EEPROM configuration on the device will enable the part to boot up with frequencies at the output in the presence of a valid input clock.

    The default configurations programmed in the device is set as follows:

    Primary and Secondary are set to LVPECL ac coupled termination and the Auxiliary input is enabled. The Smart Mux is set to auto select among Primary,

    Secondary and Auxiliary. Reference is set at 25MHz and the dividers are selected to run the VCO at 1875MHz.

    • Output 0 & 1 are set to output 156.25MHz with LVPECL signaling

    • Output 2 is set to output 125MHz/ LVPECL

    • Output 3 is set to output 125MHz/ LVDS

    • Output 4 is set to output 125MHz/ LVCMO

    A 25 MHz crystal on the AUX port should be sufficient to start the VCO calibration upon POR. Unused primary input can be left floating (it is internally terminated)

    Regards

    Arvind Sridhar

  • 0 in reply to Arvind Sridhar
    Prodigy 20 points

    Thank you very much for the detailed answer, Arvind.