Other Parts Discussed in Thread: LMK61E2
The LMK61E2 VCO chip has an output frequency divider selectable from 5 up to 511.
How is the divide by 6 done - divide by 3 and then by 2, creating a symmetric waveform, or the duty cycle is asymmetric?
What about divide by 5? That one is most likely asymmetric(?).
Is the duty cycle changing with the output stage divider setting?
Thanks, WT
