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LMK61E2: Settling Time for Frequency Change

Haim Anava
Prodigy 40 points

Part Number: LMK61E2

Hi,

a) I would like to know how much time does it takes to change frequency:

1) Settling Time for Small Frequency Change

2) Settling Time for Large Frequency Change

b) Is there an EOL date for this IC?

  • 0
    TI__Expert 4415 points

    Hi Haim,

    The settling time for a frequency change will depend on what setting of the PLL you are changing to change the output frequency and by how much you are changing it. For example, changing the PLL N divider by 1 requires about 4us for the output frequency to settle (as the PLL must re-lock), while changing the output divider by 1 is faster and only requires about 2us for the output frequency to settle.

    Is there a specific PLL control that you are changing that you need the settling time for? Or, you can provide me the initial frequency and the new frequency you wish to change to and I can test the specific case for you.

    There is currently no EOL date for this device.

    Regards,

    -Tim

  • 0 in reply to Tim Chao Li
    Prodigy 40 points

    Hi Tim,

    I would like to know what would be the maximum time (when making the largest possible change)?

    Is there a formula that I can calculate it my self?

    I would like to change the frequency with resolution of 5MHz, for example:

    1) From 50MHz to 55MHz.

    2) From 50MHz to 455MHz

    3) From 55MHz to 695MHz

  • 0 in reply to Haim Anava
    TI__Expert 4415 points
    Hi Haim,

    In general, if the settings are changed such that the PLL must re-lock to new settings or frequencies, the time it will take for the output frequency to update is 4-5us. (This applies whether or not the output divider must be changed as well).

    If only the output divider is changed, the time it takes for the output frequency to update is 2-3us.

    Whether or not a frequency change can be made by only updating the output divider depends on whether there exists a common multiple of the frequencies that falls within the valid VCO range of 4.6-5.6GHz. For example, with the frequencies you provided:

    1. 50MHz and 55MHz have a least common multiple (LCM) of 550. Therefore you could configure the PLL with a VCO frequency of 5500MHz and change the output divider from 110 to 100 (and vice versa) to update the output frequency in 2-3us.

    2. 50MHz and 455MHz have a LCM of 4550. This value (or any multiple of this value) does not fall within the VCO frequency range so you cannot change between these frequencies by only changing the output divider. The PLL settings will have to be changed, resulting in an output frequency update time of 4-5us.

    3. Similarly, the LCM of 55MHz and 695MHz is 7645 so the PLL must be updated. Update time will be 4-5us.

    Regards,
    -Tim