Clock Buffer Selection

Mickey Zhang

Genius 12080 points

Other Parts Discussed in Thread: CDCLVD110A, LMK01010, CDCUN1208LP, SN65LVDS108

Hi Team,

The customer needs to select a clock buffer.

Here are the customer's requirements:

1. Input channel number: 1

2. Output channel numbers: 8~10.

3. Each output port can be disable by the register bit or GPIO pin , like CDCLVD110A. For CDCLVD110A each output port can be disable by the register bit.

4. VCC: 3.3V , While VCC for CDCLVD110A is 2.5V.

5. Output level: LVDS

Can you recommend a suitable Clock Buffer?

Best Wishes,
Mickey Zhang
Asia Customer Support Center
Texas Instruments

with 8-10 port outputs with disable for each port and with good jitter/phase noise performance.]

over 8 years ago

0 Tim Chao Li over 8 years ago

TI__Expert 4415 points

Hi Mickey,

Here are a few suggestions that fit your criteria, listed with best additive jitter performance first:

1. LMK01010
-1:8 LVDS out, 1600MHz max
-30fs additive jitter
-Individual output enable via register programming

2. CDCUN1208LP
-1:8 LVDS out, 400MHz max
-200fs additive jitter
-Individual output enable via register programming

3. SN65LVDS108
-1:8 LVDS out, 400MHz max
-Individual output enable via pin control

Regards,
-Tim

Clock & timing

Clock & timing forum

Clock Buffer Selection