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LMK03318: LMK03318: About CodeLoader setting (LMK03318)

Part Number: LMK03318

Please let me know about unclear points below of CodeLoader.:

①Output setting

 If the case of LVPECL output, which correct LVPECL setting for n-ch?

 Is "CMOS(Hi-Z) correct? Or other selection is all ok?

② I find LVPECL selection for P ch  is LVPECL/CMOS(V-), datasheet register define is negative polarity, why?

  • Hello Frank,

    (1) When OUT_x_SEL=0x1 ("DIFF"), then only OUT_x_MODE1[1:0] is needed to select "AC-LVDS/CML/LVPECL" swing; in this case, OUT_x_MODE2[1:0] is a "Don't care".  OUT_x_MODE2[1:0] is only used to select the internal Rload value when OUT_x_SEL=0x2 (HCSL), or set the LVCMOS mode/polarity on OUTx_N when OUT_x_SEL=0x3 (LVCMOS).  

    (2) OUT_x_MODE1 and OUT_x_MODE2 are multi-purpose register settings, so their modes depend on OUT_x_SEL setting.  There is no polarity defined for "DIFF(LVPECL)".  The polarity to OUTx_P and OUTx_N apply only when OUT_x_SEL = 0x3 ("LVCMOS"); the LVCMOS polarity on OUTx_P and OUTx_N are selected by OUT_x_MODE1 and OUT_x_MODE2 settings, respectively, as shown in the last column of the register table you posted (as well as the GUI screenshots).

    Regards,
    Alan

  • Thanks for your quick answer, Alan.