Part Number: CDCE72010EVM
Other Parts Discussed in Thread: CDCE72010
I config the CDCE72010 EVM as following picture show, and the register you can see in file "CDCE_ana2.ini" in attachment.
My setup is as follow: 100MHz LVDS to PRI REF, 491.52MHz VCXO on EVM, analog lock, 12.288MHz(491.52/40) output, without AUX
My question is: why my output can't synchronize to PRI REF? If I want allenment riseing edge of PRI REF and output, will change a 200MHz VCXO help?
My output is like this:
Hi,
Is your scope holdoff function configured correctly? Without using holdoff, a scope will only be able to trigger to one frequency. As a result, even if the two frequencies are phase locked the edges will not be aligned.
The holdoff function is used to delay the arming of the trigger for a set amount of time after a trigger event. It can be used to determine whether two different frequencies are phase locked. If they are phase locked, a scope with correctly configured holdoff will be able to align the edges.
For a very simple example of how to configure holdoff, let's say you have two clocks: a 4Hz clock and a 5Hz clock that are phase locked. If you trigger off of the rising edge of the 4Hz clock, the scope will trigger every 0.25s, and the 5Hz clock edge will not be aligned. What we want the scope to do instead is to trigger every 1s, which is the interval that it takes for the clocks to align. So, we can set the holdoff time to greater than 0.75s but less than 1s (so a holdoff setting of 0.9s would work). This way, it will arm after the rising edge of the 4th cycle but before the 5th cycle, where we want it to trigger again. See the below drawing.
In this case, the two signals are 12.288MHz and 100MHz. The ratio of these two frequencies is 384 to 3125. In other words, after 384 cycles of the 12.288MHz clock and 3125 cycles of the 100MHz clock, the edges will align. Therefore, we want to set the holdoff time to slightly below 3125 * 1e-8 or 31.25uS, but not less than 31.25uS - 8.14e-8s (the period of the 12.288MHz clock), or 31.16uS. 31.2uS would be a good holdoff setting for the scope to check if the signals are phase locked or not.
Regards,
-Tim
