CDCM9102: CDCM9102 Clocking and Partial Shut Down Questions

I have a customer who is targeting the CDCM9102 for a PCI Express application.  Can someone respond to the 3 questions below? 

1.  Datasheet says that it is a low-jitter clock generator designed to provide reference clocks for PCI Express.   Can he assume it meets the jitter requirement for PCI Express?  (DH:  Based on the datasheet comment that this device can be used for Reference Clock Generation for PCI Express Gen 1, 2 and 3, I assume this answer is YES)

2.  It requires a 25 MHz input crystal.  Can this crystal be shut off when he shuts down the CDCM9102 using the OE pin 7?

3.  There is a 25 MHz output from CDCM9102, which is not needed.  Can this 25 MHz output be shut off since it is not needed?  How should it be terminated? 

Thanks, David

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David Hildebrand
Analog Field Applications
South Region
Texas Instruments, Inc.
Office:  214-479-0917
Cell:       972-841-6499
david.hildebrand@ti.com
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