• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 21 subscribers
  • Views 653 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04828: LMK04828 SDCLKout and DCLKout amplitude with same output interface

Jade Goo
Intellectual 1940 points
Part Number: LMK04828

Hi Team,

When customer use SDCLKout to SYSREF, they found higher signal amplitude than paired DCLKout with single-ended proving.
Both output interface are LVDS. Differential Signal(VOD) is almost same, but different amplitude when measure single-ended.
Could you check this is normal?
Thank you.

Best Regards,
Jade

  • 0
    TI__Mastermind 28550 points
    What are the frequencies of the two clocks? Device clock typically has a higher output frequency than SYSREF. It is possible at high frequency the output swing is a bit lower than SYSREF clock swing.

    Do I understand when Vod is measured on DCLKout and SDCLKout, the swing is the same. But when measuring single ended, the SDCLKout amplitude is higher? This should not be possible. For LVDS, I do recommend making measurements differential as it is a current drive output. This could be the reason for your issue. LVPECL is ok to do single ended, but sometimes performance is degraded when doing this with LVDS.

    73,
    Timothy