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LMK04826: Can digital delay be enable with clock distribution mode?

Part Number: LMK04826

Dear Technical Support Team,

Can digital delay be enable with clock distribution only for clock and sysref?

I don't use VCO and PLL like below and I'd like to use digital delay.

How is the digital delay steps without VCO? Is it depended on input clock freqency?

Best Regards,

ttd

  • Hello,

    You can use digital delay with distribution mode.

    The frequency of the CLKin1 path determines the step size of digital delay. Full steps are equal to the clock distribution path period. Half steps are half the clock distribution path period and duty cycle from CLKin1.

    73,
    Timothy
  • Hi Timothy,

    Thank you for your reply.
    I understand that DCLKout(redline) can be delayed by digital delay and input VCO clock(1966.08MHz) through CLKin1.
    So the step size is about 500ps.
    Can the SYSREF(Input 61.44MHz through CLKin0) be delayed by digital delay with 500ps(1VCO) on SDCLKout(Blue line)?
    Or is it 16.27ns(61.44M) step size ?

    Best Regards,
    ttd