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CDCM6208: Asserting SYNCH high before PDN

Part Number: CDCM6208

Hi,

In the datasheet of CDCM6208, it is mentioned that the device outputs are synchronized on a low-to-high transition on the SYNCN pin.

What happens if PDN is low during low to high transition on SYNCN?

Thanks & Regards,

Madhu

  • Hi Madhu,

    In this case, the device will keep the outputs disabled until the PDN goes high- at that time it will synchronize and enable the outputs.

    See the finite state diagram on page 33 of the datasheet for a more detailed explanation of the order in which the device starts up and synchronizes the outputs.

    Regards,
    -Tim