This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04828: Length Matching Requirements?

Part Number: LMK04828
Other Parts Discussed in Thread: DAC38J84EVM

Hi Team,

I have a customer who is implementing a design based on the DAC38J84EVM and they are looking to utilize the clocking distribution strategy outlined in section 5.1 of the user's guide, specifically related to the LMK04828 conditioner.

In this case, an S/SD pair is routed to the FPGA, and a separate S/SD pair is routed to the DAC. Now, they understand that a S/SD pair needs to be matched. Are there any length matching requirements between the LMK->FPGA S/SD pair and the LMK->DAC S/SD pair that they need to be aware of?

Thanks for your help,
Mitchell

  • Hi Mitchell,
    Please follow the guidelines in the EVM user guide. The SYSREF & Device clocks should belength matched to keep the timings. I dont think there is a matching requirement for LMK->FPGA S/SD pair and LMK-DAC S/SD pair but as i mentioned, the within a pair, the timing allignment should be maintained.
    Best regards
    Puneet