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CDCVF2505: CDCVF2505 / Additional delay

Part Number: CDCVF2505

Hi,

I understand that the feedback delay can be optimized by adding capacitor to CLKOUT pin, then can the delay of 1Yx pin be adjusted individually by adding capacitor to each 1Yx pins?

Best Regards,

Satoshi / Japan Disty

  • Hello Satoshi-san,

    The PLL feedback is taken from the CLKOUT pin. By adding the capacitor on the CLKOUT will adjust the delay in all Yx outputs. Delay in any clock path depends on the capacitive loading on that path. If the loading is changed, the delay in that path will also change.

    Best regards
    Puneet