I have an application using two LMX2492 devices. One is at roughly 8.1 GHz and the second is at 9 GHz. I'm measuring the beat frequency (900 MHz) between the two as I engage the ramping functionality. Both are configured to perform identical ramps (same length and increment) and this has been confirmed. I notice that as the ramp bandwidth increases beyond roughly 190 MHz (inc ~ 1550) the higher frequency synthesizer (9 GHz) is delayed relative to the low frequency synthesizer and the beat frequency is progressively pushed lower until it wraps around. Is there a frequency dependent functionality in the PLL that would produce such a delay?
It seems quite odd because they are configured for the same ramp length, are operating on the same clock and produce identical ramp bandwidths.
Thanks all.