LMK04828: PHASE NOISE VALUES FOR LMK04828

bharath

Part Number: LMK04828

Dear sir,

We are using LMK04828 Dual PLL in our design. For this we required phase noise values for various frequencies as mentioned below,

Input Frequency to PLL : 25MHz (SiT5000AI-8C-33E0-25.000000)

VCXO Frequency : 100MHz(CVHD-950X-100.000)

Output frequencies :

DCLKOUT0 : 120MHz , LVDS mode , provide for 60MHz also

DCLKOUT2 : 240MHz , LVDS mode

DCLKOUT4 : 100MHz , LVDS mode

DCLKOUT6 : 100MHz , LVDS mode

DCLKOUT8 : 2400MHz , LVPECL mode

DCLKOUT10 : 100MHz , LVDS mode

SDCLKOUT5 : 100MHz , LVDS mode

SDCLKOUT9 : 10MHz , LVDS mode

SDCLKOUT11 : 10MHz , LVDS mode

Regards,

Jaya Bharath

over 8 years ago

0 Puneet Sareen over 8 years ago

TI__Expert 8865 points

Hello Jaya,
You can use the Clock design tool for simulating the phase noise performance. You can download it from the link below:
www.ti.com/.../clockdesigntool
Let me know if you see any issue using the tool.
Best regards
Puneet

0 bharath over 8 years ago in reply to Puneet Sareen

Intellectual 425 points

Dear puneet,

I tried with clock design tool . But it showing same phase noise values for all output frequencies and also values are very high.

Regards,
Jaya bharath

0 Puneet Sareen over 8 years ago in reply to bharath

TI__Expert 8865 points

Hi Jaya

Please program the tool like shown in the atttached snapshot. Select the output dividers according to the requeired frequencies and then plot the output phase noise. While plotting, the tool by default takes 1kHz - 10kHz as integration bandwidth. You will have to change that if you are interested in 12kHz-20MHz integration bandwidth.

Let me know if you still see any issue.

Best regards

Puneet

Capture.zip

Clock & timing

Clock & timing forum

LMK04828: PHASE NOISE VALUES FOR LMK04828