LMK04828: Hitless switching

Hello Yarn

When HOLDOVER_HITLESS_SWITCH bit is enabled, it effects the way device comes out of holdover and relock.
When SET, the device will stay in holdover until the phase of the PLL feedback clock and the input clock comes close due to the slight frequency difference introduced by the holdover in the PLL feedback clock. As soon as the phase are close, the device will exit holdover. This will creat a very little disturbance in the output clock. It should be taken into account that the frequency difference between the two clocks can be very small. In that case, the phase will move very slow and it might take long time to exit holdover.

Best regards
Puneet