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CDCM7005: Reference clock selection in manual mode

seb geff
Prodigy 20 points
Part Number: CDCM7005


Hello,

I use a CDCM7005 on my electronic board with two REF_CLK at 10MHz and a VCXO at 960MHz.

My configuration is the follow:

When I drive the REF_CLK pin (35 in QFN) to '1' to toggle with PRI_REF, the CDCM doesn't switch to the primary clock (the PLL is locked on the SEC_REF).

WHY ?

Thanks for your reply,

Sebastien

  • 0
    TI__Expert 4415 points

    Hi Sebastien,

    I see that the reference clock selection is currently set to Manual, so the REF_SEL pin should select between PRI_REF and SEC_REF. How are you determining that the device is locked to SEC_REF? If you remove one input so that only one 10MHz input is present, does the REF_SEL pin work?

    Regards,

    -Tim

  • 0 in reply to Tim Chao Li
    Prodigy 20 points

    Hi Tim,

    I monitor the pins:

       - PRI_SEC_CLK (23 qfn) to know the reference clock selected

       - PLL_LOCK (25 qfn) to know if the PLL is locked

    In automatic mode (word_0, bit_30 = 1), the PRIM_CLK is selected and if I remove it, the CDCM doesn't toggle on the SEC_CLK and the PLL is unlocked.

    Sebastien