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LMX2594EVM: Seeking suggestions for spur reduction

Alex Wargo
Prodigy 230 points
Part Number: LMX2594EVM

Hello,

I am operating the LMX2594EVM with a Fpd of 20 MHz. I have the N divider set to 376 and am using the 7.52 GHz directly from the VCO as the output. I am measuring -70 dBc spurs at 10 and 20 MHz offset. Is this an expected result under these conditions?

Reducing the charge pump current (reducing the PLL bandwidth) improves spur performance. However, the minimum (and best performing) value I can choose using the TICS GUI is 3 mA. There is an option for 0 mA, but the PLL loses its lock at this setting. I would like to continue lowering the charge pump current to hopefully continue lowering the spurs. Is there a way to set the charge pump current to a custom value less than 3 mA?

Thanks

Alex

  • 0
    TI__Expert 5370 points
    Dear Alex,

    I will go check in the lab what can be done. I will get back you.

    Regards, Simon.
  • 0 in reply to Simon Damphousse
    Prodigy 230 points

    Thank you. I think it may also be important to mention that I am giving the EVM a single ended external reference of 10 MHz and using the on-board frequency doubler to obtain a phase detector frequency of 20 MHz. Let me know if you have any additional questions about my setup.

    Alex

  • 0 in reply to Alex Wargo
    TI__Guru** 107870 points
    Hi Alex,

    3mA is the smallest setting, there is no way to reduce the charge pump current further.
    With your configuration and the EVM loop filter, the loop bandwidth is approx. 15kHz. If you feel comfortable with this bandwidth, I suggest you redesign the loop filter for this bandwidth. The original loop filter is design for much higher bandwidth and therefore the RC that are used to construct the loop filter is rather small. If you redesign the loop filter, the RC value will bigger. I believe the spurs, which is due to fpd leakage, will be smaller.
  • 0 in reply to Noel Fung
    Prodigy 230 points

    Hi Noel,

    Thank you for the response, but some things are still not clear to me.

    I was under the impression that loop bandwidth is the main figure of merit for determining fpd leakage and that, generally, the smaller the bandwidth the more the leakage is attenuated. How does having larger value components with the same equivalent bandwidth reduce the fpd leakage further?

    Thanks again,

    Alex