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LMK04826: SYSREF_CLKin0_MUX SYSREF_MUX reg 0x139

Part Number: LMK04826


Hello,

I have an eval board with a LMK04826B on it.  I would like to use a common signal for both locking PLL1 and sysref as discussed here:

https://e2e.ti.com/support/clocks/f/48/t/424453

I am running VCO1 at 2500 MHz locking a 100 MHz VCXO to an external tone (several megaherz) reference on CLKin1.  I would like to use the same reference - split - for sysref on CLKin0.  My problem is with register 0x139.  If I use the VCO for sysref it is no problem:

SYSREF_CLKin0_MUX = 0

SYSREF_MUX = 3 (continous)


If I try and switch to the external reference:

SYSREF_CLKin0_MUX = 1

SYSREF_MUX = shouldn't matter - but I've tried 0, 1, 2, 3


I get absolutely no output.  I can verify signal is present on CLKin0 by switching the PLL1 mux over to CLKin0 and showing lock but for the testing shown here:

reg 0x147 is set to 0x18:

CLKin_SEL_POL = 0

CLKin_SEL_MODE = 1 (cLKin1 Manual)

CLKin1_OUT_MUX = 2 (PLL1)

CLKin0_OUT_MUX = 0 (SYSREF Mux)


Thanks for any info anyone can provide.