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CDCLVP1102: CDCVLP1102 distorted output duty cycle

Nir Flysher
Expert 3367 points
Part Number: CDCLVP1102

Dear Team,

My customer is using the CDCLVP1101 with a nice 32MHz , 50% duty cycle, Single ended LVCMOS input (other pin is tied to GND) and Vcc=3.3V.

On the LVPECL output they observe the same frequency but with distorted duty cycle of ~44%.

Can you please advise what might have gone wrong ?

Best regards,

Nir.

  • 0
    TI__Expert 8505 points

    hi Nir,

    What kind of output components did they use on the output trace and terminations? LVCMOS and LVPECL terminate differently and that could cause distortions if not the correct components for the output type. See attached literature about the methods of terminations.Signal_Types_and_Terminations-1.pdf

  • 0
    TI__Mastermind 32575 points

    They need to bias the "INN" input to Vth, where Vth is the mid-level voltage of the single-ended LVCMOS signal at the "INP" input. This defines the input switching threshold level, as shown in Figure 3 of the datasheet.  For example, if the INP input levels is 0V to 3.3V, then bias INN input to Vth~1.65V.

    Regards,
    Alan