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LMX2594: Reference Clock Selection and Minimum Slew Rate

frederich lutsche
Prodigy 70 points
Part Number: LMX2594
Other Parts Discussed in Thread: LMK00304, LMK01000,

Hi, I am having hard time about choosing a right topology for my design . 

I have three reference clock which I want to choose one at a time for my PLL's(LMX2594) reference clock. 

- One clock reference is OCXO on my PCB for low phase noise

- One clock reference is TCXO on my PCB

- And the other is external clock.

The problem is TCXOs can't drive 50ohm loads,(at least the ones I have searched. Could you please suggest me a one if you know). So I started searching fanout-buffers. However, they require high slew rates like LMK00304 and my OCXO's and TCXO's output slew rate is about 3V/5ns. 

Could you please suggest me a solution for this problem ? What is the best buffer with lowest additive jitter and requires lower input slew rates ? Or  is there a better solution than using fanout buffers? LMK01000 is the best one I could find . 

Also I couldn't find any information about minimum required slew rate of LMX2594 reference clock. 

  • 0
    TI__Guru** 110570 points
    Hi Frederich,

    What are the frequencies and amplitudes of all the reference clocks? And what is the format of the external clock?
  • 0 in reply to Noel Fung
    Prodigy 70 points
    Thanks for the answer, the format of the external clock is unimportant since I can set it to whatever I want. All of the reference clocks' frequencies is 100MHz. OCXO has a LVCMOS output(High Voltage is 3V) and TCXO has a LVDS output with 350mV differential voltage. However I can change them If there is a better solution. I couldn't find any TCXO with low slew rate and high output power.
  • 0 in reply to frederich lutsche
    TI__Guru** 110570 points

    Hi Frederich,

    LMK00304 is a perfect match them.

  • 0 in reply to Noel Fung
    Prodigy 70 points

    Hi Noel thanks for answers, the problem with LMK00304 is that it requires high slew rate like 3V/ns for optimum performance. Why LMK01000 is not a better solution . By the way, I will use OCXO or TCXO on PCB not both of them at the same time. So 2 selective inputs is enough. 

  • 0 in reply to frederich lutsche
    TI__Guru** 110570 points
    Hi Frederich,

    both LVDS and CMOS signals are in square wave format, their slew rate are indeed very good, especially when the frequency is high enough, like 100MHz in this case.
    Yes, LMK01000 is also a suitable candidate. However, as you only need four outputs, then LMK00304 seems to be a better choice.
  • 0 in reply to Noel Fung
    Prodigy 70 points
    Hi Noel,

    Thank you very much for helping me, LMK00304 will be wonderful to use if I can provide it`s requirements. However, I can not be sure about minimum slew rate requirement. I am planing to use SIT5021 as a TCXO and it has 350mV differential output, and 495ps rise and fall time. So it`s slew rate is approximately 0.7V/ns am I wrong ? And it is not sufficient for LMK00304?
  • 0 in reply to frederich lutsche
    TI__Guru** 110570 points
    Hi Frederich,

    The slew rate requirement for LMK00304 is to ensure that you will get the best output noise floor. Even if this requirement is not met, the buffer will work as usual. This is true for both LMK buffers.
    While the slew rate is a concern, I am more concern on the phase noise of the chosen TCXO. In general, the phase noise of MEMS based XO does not have very good phase noise. To get the datasheet performance of LMX2594, you may need to pick a crystal-based XO as its reference clock. Do you have the phase noise spec of the TCXO?
  • 0 in reply to Noel Fung
    Prodigy 70 points

    Hi Noel, 

    My main goal is to design for best phase noise performance. So I can use LMK01000 if it will do better job than LMK00304 with low slew rate. Actually I want to use LMK00304 but it's additive jitter is getting pretty high at low slew rates and I couldn't find any  OCXO or TCXO with high slew rate. I can use another buffer if there is a better solution(I don't mind even if it has 15 outputs. My priority is performance )

    And there is one thing I want to ask about LMK01000's datasheet : 

    "Min CLKin Frequency Input Slew Rate : 0.5V/ns"  is given . So If I apply a reference clock with 0.5V/ns slew rate, can I get the performance specs in datasheet like 68fs additive jitter for LVPECL outputs ? 

    My TCXO Phase Noise specs : 

    1 Hz offset – -54 – dBc/Hz

    10 Hz offset – -82 – dBc/Hz

    100 Hz offset – -104 – dBc/Hz

    1 kHz offset – -126 – dBc/Hz

    10 kHz offset – -132 – dBc/Hz

    100 kHz offset – -135 – dBc/Hz

    1 MHz offset – -149 – dBc/Hz

    5 MHz offset – -155 – dBc/Hz

  • 0 in reply to frederich lutsche
    TI__Guru** 110570 points

    Hi Frederich,

    As input signal slew rate will affect the noise floor of the buffer. From the datasheet, the noise floor of LMK01000 LVPECL output is -158dBc/Hz. Assume the noise floor degrades to -155dBc/Hz with input signal having 0.5V/ns slew rate. With your TCXO as the input clock, then the output phase noise of the buffer at 5MHz offset will become -152dBc/Hz. However, if the loop bandwidth of LMX2594 is <<5MHz, then this increment in phase noise is not important.

    LMX2594 cares the phase noise of the reference signal at offset below the loop bandwidth. If the loop bandwidth is 200kHz, then the phase noises of the reference signal at offset below 200kHz are important. If you add the noise floor of the buffer to the TCXO phase noise, at offset below 200kHz, the output phase noises are pretty much the same as the TCXO. So the "additive jitter" of the buffer is actually not important here.

    I would say the slew rate of the TCXO and the noise floor of the buffer are not important here. The phase noise of the TCXO is a concern. In LMX2594EVM user's guide, we have the following description. It is expected that the in-band phase noise of LMX2594 is not going to be optimized with your TCXO.