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LMK03806: ppm calculation in Digital Lock Detect from datasheet

YIFEI ZHAO
Prodigy 40 points
Part Number: LMK03806

Dear Sir/Madam,

I am reading the datasheet of LMK03806. On in section "9.1.6 Digital Lock Detect" on page 44, there is a equation to calculate ppm as show below.

ppm = 2e6 * 3.7 ns * fpd / PLL_DLD_CNT

PLL_DLD_CNT is 14-bit. From this equation, the ppm can be redcued by reducing the value of fpd.

Qs 1.:  However, in practice, is it correct that using small fpd can provide a low jitter output in ppm?

Qs 2.: Small fpd will increase the minimum lock time. So will the increased minimum lock time affect the performance of this ic?

Thank you.

Yifei

  • 0
    TI__Expert 8865 points
    Hi Yifei
    ppm calculation is only valid for flagging the digital lock detect signal. That means if you calculate the ppm with some setting, the Digital Lock Detect signal will go high when the output frequency error reaches that number. Ultimately the ppm error will go to down to 0.
    So to answer your questions:

    Qs 1.: However, in practice, is it correct that using small fpd can provide a low jitter output in ppm?
    A: As explained, ppm refers not to the jitter but the frequency error when Digital Lock is flagged.

    Qs 2.: Small fpd will increase the minimum lock time. So will the increased minimum lock time affect the performance of this ic?
    A: It depends on the quality of the input clock and PLL bandwidth. lower PFD frequency will also increase the inband PLL noise, it is recomended to use the highest possible PFD frequency.
    Best regards
    Puneet