SysRefReq will be re-clocked by finterpolator,finterpolator is divided from VCO out. It seems that sysref output will have several possible phase . So there is no deterministic phase relation between SysRefReq and SYSREF output?
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SysRefReq will be re-clocked by finterpolator,finterpolator is divided from VCO out. It seems that sysref output will have several possible phase . So there is no deterministic phase relation between SysRefReq and SYSREF output?
Dear Brian,
THanks for your quick reply!
SYNC mode means part of the channel divider is in the feedback path,but SYSREF_DIV_PRE and SYSREF_DIV is outside of feedback path. So the 2 dividers is synchronized(reseted) by SYSREF_REQ? And so SYSREF_REQ should meet the setup and hold time of output clock?
Best regards,
Lxd