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LMK04828: LMK04828

E G
Intellectual 400 points
Part Number: LMK04828
Other Parts Discussed in Thread: LMK04832

Hi,

I have PLL2 VCO output of 3GHz that I intend to use as device clock to my adc on the same board with LMK04828. Thus I need this signal to directly go through DCLKoutX_MUX. I can do this by setting DCLKoutX_MUX=2 which is the bypass mode, however since I skip the divider by choosing bypass mode do I lose synchronization between sysref and DCLKout since I skip the divider? 

I can also try setting divider=1 to make sure that DCLKout goes through the divider and syncronized by sysref, however If I choose divider=1 I can't set DCLKoutX_MUX=0.

Erdal

  • 0
    TI__Genius 9920 points

    Hi Erdal,

    When you skip DCLKout divider, you still could build fixed phase relationship for DCLKout  with VCO frequency and sysref. Because all output clocks are from VCO, when you synced sysref divider, the phase relationship had been fixed. You will lost digital delay function on DCLKout when select DCLKoutX_MUX=2. But delay tuning on SYSREF is fine. See details from block diagram.

    For 3G DCLKout, LMK04832 could achieve better jitter performance than LMK04828.

  • 0 in reply to Shawn Han
    Intellectual 400 points

    Thank you very much. I am indeed using LMX for the generation of 3G clock and just using LMK for creating independent clocks and sysref signals for JESD204B interface.