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LMK04616EVM: Zero Delay Mode PLL2 Lock issue.

Part Number: LMK04616EVM
Other Parts Discussed in Thread: LMK04616

Our clock board is now ready to use the LMK04616 chip. We want to be able to use zeros delay mode.

According to the document register 0x146, select the OUTCH8 output for feedback, and then the corresponding N to modify the PLL2. But when the configuration is explained by the register in the document, PLL2 is not locked.

  • Hello Shuang,
    There is a bug in the TICSpro software to setup this mode, please send me an email at clock_support@list.ti.com and i can share a pre-released version of the TICSpro to configure this mode correctly.
    Best regards
    Puneet